lv1_gpu_context_allocate (217)

Creates a Channel to the gpu through the hypervisor at max 8 which seems to bein accordance with the nv47 specs

(What we used to belive) Allocate a GPU Context, that is used by many other lv1_gpu_* calls.

When finished with the context_handle, free it by using lv1_gpu_context_free

status = lv1_gpu_context_allocate(ps3fb.memory_handle, 0,
				  &ps3fb.context_handle,
				  &lpar_dma_control, &lpar_driver_info,
				  &lpar_reports, &lpar_reports_size);

without obscurification

status = lv1_gpu_context_allocate(memory_handle, 0,
				  &channel_hv_handle,
				  &lpar_channel_control, 
                                  &lpar_channel_info,
				  &lpar_channel_reports, 
                                  &channel_reports_size);

lpar_driver_info is a Physical Address of a structure on the other side of the Hypervisor. The Kernel uses ioremap to make the physical address accessible by the Kernel. Eg:

ps3fb.dinfo = ioremap(lpar_driver_info, 128 * 1024);

By creating several channels and comparing data it is revealed that several of these regs are mapped individually in the hv this example is from a 2.50+ ps3

128KB of memory is iomap’d in this way, although the data is given the structure: gpu_driver_info which is much smaller than 128KB. For each call of lv1_gpu_context_allocate, a new gpu_driver_info is allocated at offset 0×4000 from the previous one. This make a total of 8 possible contexts for 128KB, corresponding to the hardware context switching capabilities of the RSX. However, the Kernel only uses one context, so it does not explain why it maps 128KB. (was: What is in the rest of the space???)

lpar_dma_control is the Physical Address of the FIFO control registers. The FIFO is located in system RAM and used to send commands to the RSX. These registers control the pointers of the RSX in the FIFO.

lpar_reports is the Physical Address of the DMA notification zone available to report completion of RSX commands. The lpar_reports_size indicates the size of the lpar_reports structure.

The second parameters is not used by the kernel, but is supposed to contain flags. The following values change the behaviour of the call, other values are unknown:

Remapping and dumping “lpar_driver_info” on an EU 1.5 firmware PS3 reveals the following information:

Starting at offset 0×58 of lpar_driver_info, we find some RSX object handles:

Note that DMA objects created through lv1_gpu_context_allocate flags do not appear in the driver info structure.

The first 2 “display_head” structures contain the following information (the following 6 are filled with zeroes)